# Carrier group alignment and user acceptance — 2026-09-22 This is the current acceptance record. It supersedes pending-user-confirmation items in the earlier research and A0/A1 notes; it does not replace their original manufacturer evidence or claim new hardware tests, fabrication approval or certification. ## Saved placement Coordinates below are **carrier-local mm**, X right/Y down. Add (100,100) for KiCad coordinates. All footprint rotations remain zero. Body centres, not header/pad origins, define the common vertical axis **X=56.970 mm**. | Item | Old footprint origin | New footprint origin | Movement | |---|---|---|---| | U2 RS-232 | (43,26.670) | unchanged | none | | DS1 OLED | (43,36) | (43.970,36) | +0.970 X | | R1 | (43,34) | (42.160,32.6685) | −0.840 X, −1.3315 Y | | R2 | (54,34) | (53.160,32.6685) | −0.840 X, −1.3315 Y | | R3 | (65,34) | (64.160,32.6685) | −0.840 X, −1.3315 Y | | SW1 | (43,68) | (41.720,68) | −1.280 X | | SW2 | (55,68) | (53.720,68) | −1.280 X | | SW3 | (67,68) | (65.720,68) | −1.280 X | U1 remains (8,23); carrier outline, four carrier mounting holes, RF reserve and confirmed USB geometry are unchanged. Resistors remain a horizontal group with 11 mm pitch; buttons remain a horizontal group with 12 mm pitch. Neither group was rearranged into a vertical stack. The published RS-232 bare PCB spans X=41.095…72.845, Y=0…29.337, including its rounded rear corners beyond the header row. Its centre X=56.970 is retained to minimize module movement and preserve connector/case registration. OLED PCB bounds are X=43.970…69.970, Y=36…62. The OLED's offset display window is not used as the module centre. The nominal resistor bodies are 6.3 × 2.5 mm, centred 3.81 mm right of pad 1. Their group spans X=42.820…71.120, Y=31.4185…33.9185. The 6.663 mm gap between module boards is therefore split into **2.0815 mm clearance / 2.5 mm body / 2.0815 mm clearance**. Adjacent resistor bodies have 4.7 mm horizontal clearance. These are nominal planar CAD clearances, not new tolerance or height measurements. Omron B3F-1000 nominal bodies are 6 × 6 mm with centres 3.25 mm right and 2.25 mm below their pad-1 origins. Group body bounds X=41.970…71.970, Y=67.250…73.250; OLED-to-button body gap **5.250 mm**, adjacent button body gaps **6 mm**. Footprint courtyard and lead envelopes are wider than the bodies; the alignment audit uses the actual F.Fab bodies, not a pad-origin average. ## Closed by explicit user acceptance/report - All component dimensions and physical fit match visually; USB placement and clearance are correct. This is user acceptance, not an independently performed new print-fit or hardware test by the agent. - Female headers are described as 8.5 mm and standard male headers as adding 2.5 mm. User intends/reports **10 mm assembled elevation**. The arithmetic sum is 11 mm, but mating height cannot be inferred by simply adding those descriptions. **10 mm is not independently measured or precision-verified.** User reports RS-232 mounting prongs clear the carrier at the intended assembly height. - Four Ø3.2 mm M3 carrier holes approved; **10 mm brass standoffs into heat inserts**, M3 daughterboard screws, and **M2 display hardware** selected. This does not establish DE-9 cable-retention thread type, exact screw lengths, insert dimensions or the final printed case wall/cutout. - **Omron B3F-1000 switches purchased.** Existing standard KiCad footprint is retained; documented duplicate-pad mapping is unchanged. - **2 kΩ, 1% metal-film resistors purchased.** R1–R3 values updated in schematic, PCB and BOM; nominal DIN0207 6.3 × 2.5 mm body / 7.62 mm lead pitch retained under the visual-fit confirmation. Exact resistor MPN and purchased wattage were not supplied. Design requirement remains at least 0.125 W. At nominal 3.3 V, each pressed external pull-up draws 1.65 mA and dissipates 5.445 mW; these calculations do not quantify regulator margin or GPIO internal pull-ups. - Male Adafruit module has identical reference pinout/header mapping/footprint per user, who reviewed module connections pin by pin. Existing schematic U2 assignment `Carrier:MAX3243_Reference_Provisional` is preserved; clean parity is required, not waived. Original female CAD provenance is unchanged. - Nonisolated USB power arrangement explicitly accepted and reported already tested by user. **Successful operation does not establish backfeed safety**, in particular with simultaneous powered hosts. No isolation/backfeed protection was added or claimed. - Existing 3.3 V supply successfully powers the modules per user. This is operating evidence, not measured regulator current/thermal/transient headroom. - User confirms backside OLED I²C pull-ups and operation without extras. **Their resistance and termination rail remain unmeasured.** No values/rail are invented and no external I²C pull-ups added. - Current RF reserve and power/ground routing accepted based on visual and operational experience. This is not manufacturer RF qualification, measured signal/power integrity, regulator-margin proof, EMC testing or certification. ## Verification and remaining limits Incremental routing starts from `hardware/PCB/validation/pcb-before-group-alignment.kicad_pcb`. It removes copper obstructed by moved pads, reconnects retained routes and trims KiCad-reported dangling stubs. **476/587 original copper items remain exactly unchanged**; 111 original items removed. No whole-board regeneration or route reset was used. `pcb-group-migration.json` records the removed UUIDs and repairs; `validate_group_alignment.py` checks the full parsed non-copper delta, retained copper UUID/content, body centrelines/gaps, and unchanged project settings. Original A0 and measured-U1 snapshots/reports are retained, not rebaselined. Run from repository root: ```sh /usr/bin/python3 -B hardware/PCB/validate_schematic.py /usr/bin/python3 -B hardware/PCB/validate_pcb_draft.py /usr/bin/python3 -B hardware/PCB/validate_group_alignment.py /usr/bin/python3 -B hardware/PCB/validation/pcb-routing-check.py /usr/bin/python3 -B hardware/PCB/validate_u1_update.py /usr/bin/python3 -B hardware/PCB/validate_footprints.py /usr/bin/python3 -B hardware/PCB/reference/db9-cad/validate.py ``` Validation completed with KiCad 10.0.6: schematic ERC **0 errors/warnings**; PCB DRC **0 physical violations, 0 unconnected items, 0 parity issues**. All 17 connected nets, 9 electrical components, 44 U1 pins and 15 firmware GPIO contracts checked. Current routing: **938 segments, 41 vias**; unchanged width rules (0.25 mm signal / 0.50 mm power and ground), 0.70/0.30 mm vias. Independent minimum different-net/copper-to-NPTH gap **0.252762 mm**, minimum board-edge gap **1.900 mm**; RF reserve remains clear. Exact group/preservation and U1/silk regressions, two footprint tests and DB9 CAD/source checks passed. KiCad bindings emit known startup enum-property assertions but all checks complete successfully. DB9 projections and 94 device-silkscreen items refreshed. Placement PDF (1:1), PCB SVG/PNG/3D and schematic PDF/SVG/PNG regenerated; PNG previews visually reviewed. The 3D view still lacks complete module models and is not assembly qualification. No removed PCB presentation/draft markers were reintroduced. Current acceptance closes the user-review gates above. Still not independently qualified: regulator margin, USB backfeed safety, pull-up values/rail, RF/EMC, complete tolerance/height/case/actuator envelopes, finished-hole fabrication process and certification. Missing module courtyards remain a known model limit; DRC does not validate complete assembled-module or case fit. No new hardware tests, firmware changes, Gerbers, fabrication order or manufacturing approval.