Advance PCB carrier to A1 layout

Reposition the ESP32 and RS-232 reference within the notched outline,
preserve the A0 snapshot, and add second-pass two-layer routing
evidence.
Refresh validation reports and draft previews while keeping fabrication
status provisional.

hardware/PCB/validation/pcb-validation-summary.json

@@ -3,6 +3,100 @@
     82,
     80
   ],
+  "outline_local_mm": [
+    [
+      36,
+      0
+    ],
+    [
+      82,
+      0
+    ],
+    [
+      82,
+      80
+    ],
+    [
+      0,
+      80
+    ],
+    [
+      0,
+      19
+    ],
+    [
+      36,
+      19
+    ]
+  ],
+  "placements_local_mm": {
+    "U1": [
+      8,
+      23
+    ],
+    "U2": [
+      43,
+      26.67
+    ],
+    "DS1": [
+      43,
+      36
+    ],
+    "R1": [
+      43,
+      34
+    ],
+    "R2": [
+      54,
+      34
+    ],
+    "R3": [
+      65,
+      34
+    ],
+    "SW1": [
+      43,
+      68
+    ],
+    "SW2": [
+      55,
+      68
+    ],
+    "SW3": [
+      67,
+      68
+    ],
+    "H1": [
+      3.5,
+      22.5
+    ],
+    "H2": [
+      3.5,
+      75
+    ],
+    "H3": [
+      78,
+      4
+    ],
+    "H4": [
+      78,
+      76
+    ]
+  },
+  "rf_reserve_absolute_mm": [
+    110,
+    119,
+    131,
+    132
+  ],
+  "u2_bare_pcb_front_local_y_mm": 0.0,
+  "nominal_user_confirmed_rs232_metal_mm": {
+    "shell_overhang": 3.87,
+    "hex_mouth_overhang": 2.87,
+    "flange_front_inset": 1.93
+  },
+  "tracks": 565,
+  "vias": 22,
   "copper_layers": 2,
   "draft_thickness_mm": 1.6,
   "electrical_footprints": 9,
@@ -10,7 +104,8 @@
   "physical_DRC_violations": 0,
   "unconnected_items": 0,
   "schematic_pad_nets_match": true,
-  "known_parity_warning": "U2 provisional female-reference footprint assigned on PCB only; schematic footprint intentionally blank",
+  "known_parity_warning": "U2 reference footprint assigned on PCB only; schematic footprint intentionally blank; nominal male external metal dimensions user-confirmed",
+  "project_settings_sha256": "9ad5b992785ebfe01fa7ea4e1aa391a2c7d7f1f2c3b1c13136173c301ecb6516",
   "ignored_DRC_checks": [
     {
       "description": "Footprint has no courtyard defined",
@@ -34,8 +129,8 @@
     }
   ],
   "not_validated": [
-    "male module pin map/fit",
-    "assembly envelope and heights",
+    "male module pin map/header fit",
+    "ESP32 geometry and complete assembly envelope/heights",
     "header/socket fit",
     "RF performance and antenna clearance",
     "power/return-path integrity",