Add SSH phase roadmap documentation
This commit is contained in:
@@ -14,7 +14,7 @@ ESP32-S3 firmware for a secure, multi-transport RS-232 adapter. It operates one
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## Development status
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Hardware characterization, the serial core, session broker, and native USB CDC-ACM are complete. The Wi-Fi foundation is implemented and substantially validated, with several smoke tests still pending. The project is currently entering the **HTTPS/web-console phase**; later work includes interface hardware, security hardening, OTA, BLE, enterprise Wi-Fi, WireGuard evaluation, and optional storage features. See the [implementation plan](GPT-logs/Implementation%20plan.md) for validation details and roadmap.
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Hardware characterization, the serial core, session broker, and native USB CDC-ACM are complete. The Wi-Fi foundation is implemented and substantially validated, with several smoke tests still pending. The project is currently in the **SSH-Phase**; later work includes interface hardware, security hardening, OTA, BLE, enterprise Wi-Fi, WireGuard evaluation, and optional storage features. See the [Roadmap](docs/roadmap.md) for validation details and roadmap.
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## Documentation
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# Implementation roadmap
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This document tracks the implementation and hardware-validation plan for the ESP32 Serial Swiss Army Knife. It describes intended sequencing rather than a release schedule. A phase is complete only when its implementation, documentation, build validation, and relevant hardware tests have passed.
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## Status legend
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- **Complete** — implemented and validated on the target hardware.
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- **Implemented; validation pending** — code is present and builds, but the current implementation still needs the listed hardware checks.
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- **Planned** — accepted project direction, not yet implemented.
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- **Under evaluation** — useful candidate whose feasibility, security, or resource cost must be measured before it becomes a commitment.
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## Project-wide design constraints
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These constraints apply across all phases:
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- UART0 remains the trusted physical administration and recovery console.
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- UART1 and the MAX3243 provide the single physical RS-232 data port.
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- All serial transports use the central session broker: one writer, multiple observers.
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- A slow or failed client must not block UART reception or unrelated clients.
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- Serial data paths remain binary-transparent; transports must not reserve in-band control sequences.
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- Network serial access must be authenticated and encrypted. No unauthenticated plaintext TCP serial service is planned.
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- Secrets must not be exposed by routine status output, command completion, or logs.
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- Resource use must remain bounded and observable on the ESP32-S3 N16R8 target.
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- New work must preserve USB CDC and UART0 recovery when Wi-Fi or a network service fails.
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- Project code remains `GPL-3.0-only`; third-party license notices and compatibility must be preserved.
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## Phase overview
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| Phase | Scope | Status |
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| 0 | RS-232 hardware characterization and diagnostics | **Complete** |
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| 1 | Persistent UART1 serial-service foundation | **Complete** |
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| 2 | Transport-neutral session broker | **Complete** |
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| 3 | Native USB CDC-ACM serial transport | **Complete** |
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| 4 | Wi-Fi station/AP foundation and network diagnostics | **Complete** |
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| 5A | Authenticated HTTPS administration foundation | **Complete** |
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| 5B | Offline xterm.js WebSocket serial terminal | **Complete** |
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| 6 | Authenticated SSH serial transport | **Implemented; validation pending** |
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| 7 | Local display and button interface | **Planned** |
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| 8 | Security and production hardening | **Planned** |
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| 9 | Authenticated, rollback-capable OTA | **Planned** |
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| 10 | BLE serial transport and provisioning evaluation | **Planned** |
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| 11 | Advanced network integration | **Under evaluation** |
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| 12 | Optional filesystem-backed features | **Under evaluation** |
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## Completed foundation
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### Phase 0 — RS-232 hardware characterization
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Implemented and hardware-validated:
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- Central board pin profile for the ESP32-S3 N16R8 and MAX3243 breakout.
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- MAX3243 enable, static driver, receiver, valid-voltage, and modem-signal checks.
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- UART loopback across supported framing and baud-rate combinations.
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- Hardware CTS transmit gating and RTS receive-backpressure tests.
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- Exclusive RS-232 port ownership and fault-safe cleanup.
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- RGB status indication for diagnostic state.
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- Potentially disruptive tests isolated under the `debug` CLI submenu; top-level `status` retained.
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Detailed procedures are in [Electrical tests](electrical_tests.md) and [Hardware wiring](wiring.md).
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### Phase 1 — Serial-service foundation
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Implemented and hardware-validated:
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- Persistent, versioned UART configuration with safe defaults.
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- UART1 lifecycle management and exclusive ownership.
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- Nonblocking RX and TX software streams.
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- Baud rate, data bits, parity, stop bits, RTS/CTS, DTR policy, and RTS threshold controls.
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- Runtime counters and safe restart after working-configuration changes.
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- Explicit save/load/default/reset behavior; edits are not silently persisted.
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### Phase 2 — Session broker
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Implemented and hardware-validated:
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- Up to eight generation-safe broker clients.
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- Exactly one writer lease with multiple observers.
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- Bounded per-client output and event queues.
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- Slow-observer isolation and drop accounting.
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- Writer grant, release, denial, revocation, and forced administrative reassignment.
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- DTR `on-connect` integration.
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- Partial-transfer and retryable no-progress semantics for transports.
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- Broker payload storage placed preferentially in PSRAM while FreeRTOS control structures remain in internal RAM.
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### Phase 3 — Native USB CDC-ACM
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Implemented and hardware-validated:
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- Native ESP32-S3 USB CDC-ACM serial transport.
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- Automatic broker connection when the host opens the port with DTR asserted.
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- Opportunistic writer acquisition with observer fallback.
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- Binary-transparent bidirectional serial data.
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- Supported host line-coding application while USB owns the writer lease.
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- Disconnect cleanup, bounded buffering, counters, and UART0 lifecycle controls.
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### Phase 4 — Wi-Fi foundation
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Implemented and hardware-validated:
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- Four persistent station profiles with priority ordering.
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- WPA2/WPA3 mixed mode and WPA3-SAE-required mode.
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- Explicit no-echo secret entry through UART0.
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- AP policies `off`, `fallback`, and `always`.
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- Random persistent fallback-AP password and MAC-derived default SSID.
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- Bounded profile attempts, DHCP deadlines, failover, and retry backoff.
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- Root and `wifi` aliases for `ping`, `nslookup`, and `traceroute`.
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- Wi-Fi/lwIP payload allocation configured to prefer PSRAM with capacities pinned in `sdkconfig.defaults`.
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A WPA3-required profile correctly rejects an AP that does not advertise the required Protected Management Frame capability; mixed mode is the compatible choice for such an AP.
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### Phase 5A — Authenticated HTTPS foundation
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Implemented and hardware-validated:
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- HTTPS-only service on TCP port 443 using ESP-IDF mbedTLS.
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- Persistent random shared `admin` credential.
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- Persistent device-specific ECDSA P-256 certificate and private key.
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- Physical-console credential retrieval, rotation, certificate inspection, rotation, and recovery.
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- Explicit failure behavior that preserves UART0, USB, serial, and Wi-Fi recovery paths.
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- Credential rotation revocation hooks shared with WebSocket and SSH sessions.
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### Phase 5B — Offline browser terminal
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Implemented and hardware-validated:
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- Vendored xterm.js and FitAddon assets; no Internet or CDN dependency.
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- CSP-compatible page structure with scripts served as separate resources.
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- Authenticated status and one-time WebSocket-ticket APIs.
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- Binary WebSocket serial frames and broker writer/observer integration.
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- Two bounded browser-terminal sessions.
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- Writer request/release controls and role indication.
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- Bounded TLS/socket behavior and slow-observer isolation.
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- Viewport-constrained terminal fitting without recursive page growth.
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- Validation with multiple clients, ANSI colors, advanced escape sequences, and full-screen terminal software.
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## Current phase
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### Phase 6 — Authenticated SSH serial transport
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The initial SSH implementation is present and has passed single-service hardware tests. It provides:
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- wolfSSH on TCP port 22 while HTTPS remains on mbedTLS.
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- Password authentication using the shared `admin` credential.
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- A separate persistent ECDSA P-256 SSH host key and OpenSSH-compatible fingerprint.
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- Interactive shell/PTY channels only.
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- No `exec`, subsystem, SFTP, SCP, agent forwarding, or TCP forwarding.
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- Two fixed session/handshake slots.
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- Three password attempts and a 15-second handshake deadline.
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- No broker client before successful authentication and shell negotiation.
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- Binary-transparent serial forwarding with no in-band writer-control protocol.
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- Opportunistic writer acquisition and observer behavior through the common broker.
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- Credential-rotation revocation and UART0 session/host-key administration.
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- A single bounded wolfSSH owner task pinned to CPU 1.
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- wolfSSL/wolfSSH allocations that prefer PSRAM with internal-memory fallback.
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- A per-call wolfSSH receive budget to prevent pipelined input from monopolizing the owner task.
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- Internal task stacks retained for safety during flash/NVS cache-disable windows.
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- Heap and SSH stack telemetry through `memory` and `ssh status`.
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SSH login, host-key verification, serial traffic, Web Serial coexistence, and USB CDC coexistence have been validated. Before the latest resource-placement changes, however, the following three-client arrangement could stall or fail the web service:
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1. USB CDC connected as writer.
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2. Web serial connected as observer.
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3. SSH connected as observer.
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The mitigation moves broker and Wi-Fi/lwIP payload pressure toward PSRAM and moves SSH processing away from the CPU 0 Wi-Fi/web path. Phase 6 remains open until that exact arrangement is revalidated.
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#### Phase 6 completion gate
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After flashing the current build:
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1. At idle, record:
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```text
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memory
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ssh status
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```
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2. Reproduce this order exactly:
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1. Connect USB CDC and confirm it owns the writer lease.
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2. Connect one WebSocket terminal and confirm observer status.
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3. Connect one SSH terminal and confirm observer status.
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3. While all three are connected, collect:
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```text
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memory
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ssh status
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web status
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web counters
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ssh counters
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broker clients
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```
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4. Exercise sustained RS-232 output, writer release/reassignment, and input through the newly selected writer. Verify that all observers continue receiving data and that UART0 remains responsive.
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5. Disconnect the transports in different orders and verify that sockets, broker clients, and writer ownership are cleaned up.
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6. Capture the complete UART0 log if any failure occurs, especially task-watchdog output, backtraces, `ESP_ERR_NO_MEM`, TLS allocation failures, lwIP/pbuf failures, or HTTP server accept/session errors.
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Interpret the telemetry as follows:
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- Low internal or DMA-capable free space/largest block indicates more internal-memory reduction is needed.
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- Healthy heap metrics combined with a watchdog or stall indicates a scheduling or blocking-path problem rather than simple exhaustion.
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- A consistently large SSH stack minimum-free value permits a measured reduction from the current 20 KiB stack; it must not be reduced speculatively.
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- Low or fragmented PSRAM indicates that queue, socket, or allocation capacities need review.
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Phase 6 is complete when this concurrent configuration remains stable, cleanup succeeds, the relevant counters show no unexplained loss, and no watchdog or memory-allocation error occurs.
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## Planned phases
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The order below is the current plan. Detailed requirements should be finalized at the start of each phase, and optional features must not weaken the completed serial and recovery paths.
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### Phase 7 — Local display and buttons
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Add a standalone local status/control interface without making it a dependency of the serial core.
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Planned work:
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- Select the actual display, button arrangement, electrical interface, and remaining GPIO assignment before implementation.
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- Add a board-profile abstraction where required instead of scattering new pin assumptions.
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- Show concise serial, Wi-Fi, service, client-count, and writer-owner status.
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- Provide safe button actions for navigation and common lifecycle or writer-control operations.
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- Require deliberate confirmation for destructive or security-sensitive actions.
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- Avoid displaying passwords or private-key material during ordinary operation.
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- Keep UART0 fully functional as the authoritative recovery interface if the display or buttons fail.
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- Bound display refresh and event processing so they cannot interfere with UART or network transport timing.
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Completion requires electrical validation, operation with all current transports, and documented recovery behavior.
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### Phase 8 — Security and production hardening
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Harden stored credentials, boot integrity, update trust, failure diagnostics, and dependency maintenance. This phase must be staged carefully because some ESP32 eFuse operations are irreversible.
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Planned work:
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- Define development, test, and production security profiles.
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- Enable and validate NVS encryption for Wi-Fi, HTTPS, and SSH material.
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- Evaluate flash encryption and PSRAM encryption for the target hardware and threat model.
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- Enable secure boot with a documented signing-key and recovery process.
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- Define secret-safe core-dump handling; do not expose credentials or session material in diagnostics.
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- Audit key and session-material zeroization across application, mbedTLS, wolfSSL, and wolfSSH allocations.
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- Add authentication throttling, lockout/backoff, and security-event counters where appropriate.
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- Review TLS/SSH algorithms, certificate policy, password policy, and browser security headers.
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- Review current wolfSSL/wolfSSH and ESP-IDF security releases instead of treating integration versions as permanent pins.
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- Recheck all third-party licenses and preserve source/license notices.
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- Document provisioning, key rotation, factory reset, backup, recovery, and device decommissioning.
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Security features must be validated first on expendable hardware before any irreversible production configuration is recommended.
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### Phase 9 — Authenticated OTA and rollback
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Use the existing dual 4 MiB application slots and `otadata` partition to add safe firmware updates.
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Planned work:
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- Accept only authenticated, integrity-checked firmware images compatible with the selected secure-boot policy.
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- Support an update path that does not expose a plaintext management endpoint.
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- Stream downloads with bounded RAM use and explicit progress/error reporting.
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- Preserve serial, Wi-Fi, HTTPS, and SSH configuration across successful updates.
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- Mark new firmware pending until a post-boot health check succeeds.
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- Roll back automatically after failed boot or health confirmation.
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- Define power-loss behavior for every update stage.
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- Keep UART0 recovery and wired re-flashing documented and functional.
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- Add version/compatibility checks and reject accidental downgrade unless an explicit policy allows it.
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OTA is complete only after successful update, interrupted-update, invalid-image, rollback, and configuration-persistence tests on hardware.
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### Phase 10 — BLE
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Evaluate and, if resource limits permit, add BLE as another bounded transport or provisioning path.
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Planned work:
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- Decide whether BLE is primarily a serial transport, a provisioning interface, or both.
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- Require authenticated pairing/bonding appropriate to the device threat model.
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- Integrate serial access through the existing broker rather than bypassing writer ownership.
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- Preserve binary transparency through explicit framing and MTU-aware partial transfers.
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- Bound connections, queues, retries, and advertising behavior.
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- Measure coexistence with 2.4 GHz Wi-Fi, HTTPS, WebSocket, SSH, USB CDC, and UART service.
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- Store bond/provisioning data under the hardened secret-storage policy.
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- Provide UART0 controls and a physical recovery path for clearing BLE state.
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BLE remains subordinate to stable Wi-Fi and serial operation; it should be omitted if coexistence or memory costs cannot be bounded acceptably.
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### Phase 11 — Advanced network integration
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These features are candidates, not current commitments:
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- mDNS advertisement for the certificate’s device-specific `.local` name and selected services.
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- Enterprise Wi-Fi support, subject to credential-storage and certificate-validation design.
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- IPv6 behavior and diagnostics beyond the current basic support.
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- WireGuard feasibility evaluation, including RAM, CPU, licensing, key storage, routing, and recovery impact.
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The device is not intended to become a general-purpose router. Captive-portal interception, unauthenticated DNS redirection, NAPT, and a plaintext serial listener remain out of scope unless the project requirements are explicitly revised.
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### Phase 12 — Optional filesystem-backed features
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The `storage` partition is reserved but not currently mounted. Possible uses must be justified individually:
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- LittleFS-backed web assets to decouple large static files from the application image.
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- Bounded diagnostic logs with explicit retention and secret-redaction rules.
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- Import/export of non-secret configuration.
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- Optional user files needed by later administration features.
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Before enabling storage, define corruption recovery, wear limits, quotas, atomic update behavior, compatibility across OTA slots, and whether encryption is required. Serial operation and recovery must not depend on a mountable filesystem.
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## Cross-phase release gates
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Every phase should satisfy the following before being marked complete:
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1. A clean release build for the ESP32-S3 N16R8 target.
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2. No new compiler or project diagnostics attributable to the change.
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3. Focused automated tests where practical and documented hardware tests where hardware behavior is involved.
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4. UART0, native USB CDC, and previously completed network transports still operate.
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5. Broker writer/observer semantics and binary transparency remain intact.
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6. Failure, disconnect, stop/start, reboot, and stale-session cleanup paths are exercised.
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7. Runtime memory, stack, socket, and queue bounds are measured under maximum supported concurrency.
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8. Secrets remain absent from ordinary status output and logs.
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9. [Command reference](command_reference.md), [Hardware wiring](wiring.md), electrical tests, and this roadmap are updated as applicable.
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10. New dependencies receive security, maintenance, and GPL-3.0 compatibility review.
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## Explicitly deferred work
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The following are not implemented merely because flash partitions or library support exist:
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- NVS, flash, or PSRAM encryption.
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- Secure boot or production eFuse provisioning.
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- OTA download, image confirmation, or rollback policy.
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- Core-dump collection or secret-safe core-dump processing.
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- Filesystem mounting.
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- Public-key SSH user authentication.
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- SFTP, SCP, SSH `exec`, forwarding, or subsystems.
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- General routing, NAPT, captive-portal interception, or unauthenticated serial access.
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Deferring these features is intentional: each changes the security model, recovery behavior, or bounded-resource assumptions and therefore requires its own design and validation gate.
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Block a user