Integrate A1 carrier PCB CAD updates

- Add pinned STEP-derived DE-9 mechanical measurements and provenance
- Refresh placement, routing, silkscreen, and nominal CAD envelopes
- Document provisional dimensions, assumptions, and validation status

hardware/PCB/README.md

@@ -4,7 +4,8 @@ Open **`serial-carrier.kicad_pro`** in KiCad 10, then open
 **`serial-carrier.kicad_sch`**. A readable export is **`serial-carrier.pdf`**.
 This is a native, editable schematic with actual connected nets, not an image
 or a SKiDL-only netlist. **`serial-carrier.kicad_pcb` now contains a routed,
-82 × 80 mm two-copper-layer carrier draft.** It is **not fabrication-ready**.
+82 × 80 mm two-copper-layer A1 carrier draft with a top-left antenna notch,
+USB toward the bottom and RS-232 toward the top.** It is **not fabrication-ready**.
 See **`pcb-draft-notes.md`** for placement, chosen dimensions/rules, provisional
 mechanical assumptions and validation. A review drawing is `pcb-placement-draft.pdf`.
 
@@ -25,6 +26,9 @@ the carrier. All 3.3 V and ground connections are explicit named nets.
 | `validation/pcb-draft.png`, `validation/pcb-draft-3d.png` | Copper/fab preview and carrier-only 3D render |
 | `validate_pcb_draft.py` | Fresh schematic-to-PCB net checks, bounds/layers and DRC/parity report |
 | `generate_pcb_draft.py`, `route_pcb_draft.py` | Optional destructive-regeneration tools with explicit overwrite guards |
+| `add_device_silkscreen.py` | Refresh board-local OLED/RS-232 outlines and ESP32 header guides after placement/routing; preserves copper and project settings |
+| `db9-mechanical-notes.md`, `reference/db9-cad/` | STEP-derived metal dimensions, originals, source licenses and repeatable extraction/validation |
+| `add_db9_envelope.py` | Refresh nominal connector metal projections on Dwgs.User; not a case cutout or assembly clearance |
 | `Carrier.kicad_sym`, `sym-lib-table` | Project-local module, switch and resistor symbols |
 | `Carrier.pretty/`, `fp-lib-table` | OLED/ESP32/RS-232-reference provisional footprints; standard KiCad 10 switch/resistor/mounting-hole library references |
 | `oled-fit-check.svg` | User-fit-verified OLED mechanical template |
@@ -124,7 +128,7 @@ Repository sources: `../../docs/wiring.md`, `../../src/board_pins.h`,
 | Assembly | Repository identification | Footprint status |
 |---|---|---|
 | ESP32 development board | User confirmed HW-678 V0.0.0 markings and S3-N16R8 shield, two USB-C ports | Two 22-pin rows; nominal 2.54 mm pitch and 25.40 mm row spacing supported by simultaneous breadboard fit. Mechanical outline registration and socket/drill selection remain pending. |
-| RS-232 module | Adafruit MAX3243 full-pinout breakout; male is product 6253, female is 5988 | Published female CAD pin map and geometry verified; male mapping/fit remains provisional. Reference footprint used on PCB only; schematic assignment remains blank. |
+| RS-232 module | Adafruit MAX3243 full-pinout breakout; male is product 6253, female is 5988 | Eagle pin map/PCB geometry and STEP metal dimensions extracted. User confirms identical male/female external dimensions; actual fit and male electrical map remain release checks. Reference footprint used on PCB only. |
 | Display | 128×64 yellow/blue I²C OLED, address 0x3c; Amazon ASIN B0F13SSSFB | 26 mm square board, 22.50 mm hole spacing, Ø2 mm holes and centred header 1.50 mm from top edge are user-fit-verified. Local footprint assigned; header pad/drill selection remains provisional. |
 | Three buttons | Omron B3F-1000; previous, select, next; normally open to ground, active low | Datasheet and `Button_Switch_THT:SW_TH_Tactile_Omron_B3F-100x` pad mapping verified. External 2.2 kΩ pull-ups included. Live distributor stock remains unverified. |
 
@@ -135,7 +139,10 @@ Published female-module Eagle CAD and its header map were retrieved and verified
 see `adafruit-research.md` for pinned revision, hashes, attribution and geometry.
 The original files and CC BY-SA 3.0 notices are retained in `reference/`; they
 remain under their upstream license. Omron reference documents retain their
-manufacturer notices. No male-specific module footprint is claimed verified.
+manufacturer notices. The CAD-parts repository's STEP and MIT license are separately
+retained under `reference/db9-cad/`. External metal geometry is used for the male
+module on the user's explicit equivalence confirmation; this does not validate
+its electrical map, connector threads, tolerances, assembly fit or case cutout.
 
 ## Verified logical connections for the existing firmware profile