Record Accepted PCB Placement And Fit
Align component groups, repair affected routing, and add preservation audits. Assign the confirmed U2 footprint and update pull-ups to 2 kΩ across design files. Document user acceptance, switch to an A3 worksheet, and refresh PCB exports.
This commit is contained in:
@@ -39,31 +39,31 @@
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26.67
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],
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"DS1": [
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43,
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43.97,
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36
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],
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"R1": [
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43,
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34
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42.16,
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32.6685
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],
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"R2": [
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54,
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34
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53.16,
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32.6685
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],
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"R3": [
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65,
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34
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64.16,
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32.6685
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],
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"SW1": [
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43,
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41.72,
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68
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],
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"SW2": [
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55,
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53.72,
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68
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],
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"SW3": [
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67,
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65.72,
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68
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],
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"H1": [
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@@ -95,8 +95,8 @@
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"hex_mouth_overhang": 2.87,
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"flange_front_inset": 1.93
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},
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"tracks": 565,
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"vias": 22,
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"tracks": 938,
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"vias": 41,
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"copper_layers": 2,
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"draft_thickness_mm": 1.6,
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"electrical_footprints": 9,
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@@ -104,7 +104,7 @@
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"physical_DRC_violations": 0,
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"unconnected_items": 0,
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"schematic_pad_nets_match": true,
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"known_parity_warning": "U2 reference footprint assigned on PCB only; schematic footprint intentionally blank; nominal male external metal dimensions user-confirmed",
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"schematic_parity_violations": 0,
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"project_settings_sha256": "9ad5b992785ebfe01fa7ea4e1aa391a2c7d7f1f2c3b1c13136173c301ecb6516",
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"ignored_DRC_checks": [
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{
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@@ -128,15 +128,19 @@
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"key": "footprint_type_mismatch"
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}
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],
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"not_validated": [
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"male module pin map/header fit",
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"ESP32 measured-planar 1:1 fit and complete assembly envelope/heights",
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"header/socket fit",
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"RF performance and antenna clearance",
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"power/return-path integrity",
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"USB power path",
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"OLED pull-ups",
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"fabrication process",
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"hardware operation"
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]
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"user_accepted": [
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"module dimensions/visual fit and USB clearance",
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"male pinout/header/footprint and pin-by-pin review",
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"M3 carrier/module and M2 display hardware",
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"RF keepout and power/ground routing"
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],
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"not_independently_verified": [
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"reported 10 mm assembled module elevation",
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"regulator margin",
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"USB backfeed safety",
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"OLED onboard pull-up resistance/rail",
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"manufacturer RF qualification",
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"fabrication process/certification"
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],
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"new_hardware_tests": false
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}
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