Commander1024
c257158ada
Align component groups, repair affected routing, and add preservation audits. Assign the confirmed U2 footprint and update pull-ups to 2 kΩ across design files. Document user acceptance, switch to an A3 worksheet, and refresh PCB exports.
113 lines
5.2 KiB
Python
113 lines
5.2 KiB
Python
#!/usr/bin/env python3
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"""Measured U1 integration regression and exact pre-update preservation audit."""
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import hashlib
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import json
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from pathlib import Path
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import re
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import tempfile
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import uuid
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import pcbnew as p
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from shapely.geometry import Polygon
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from add_device_silkscreen import add_outlines, NS as SILK_NS, xy, outline_lines
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from update_u1_graphics import verify, NS as U1_NS
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from remove_draft_markers import expected_tree
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ROOT = Path(__file__).resolve().parent
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PCB = ROOT / "serial-carrier.kicad_pcb"
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BASE = ROOT / "validation/pcb-before-u1-measured.kicad_pcb"
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def parse(path):
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tokens = iter(re.findall(r'"(?:\\.|[^"\\])*"|[()]|[^\s()]+', path.read_text()))
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def group():
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result = []
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for token in tokens:
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if token == ')':
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return result
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result.append(group() if token == '(' else token)
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raise ValueError("Unterminated S-expression")
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assert next(tokens) == '('
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return group()
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def ident(item):
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return next((v[1].strip('"') for v in item if isinstance(v,list) and v[0]=='uuid'), None)
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def canonical(item, excluded=frozenset()):
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# KiCad can reorder independent board items when saving; compare their full
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# parsed contents, not byte order. Pad coordinates/netnames/UUIDs remain exact.
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if not isinstance(item, list):
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return item
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values = [canonical(v, excluded) for v in item
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if not isinstance(v,list) or ident(v) not in excluded]
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if item and item[0] in ("kicad_pcb", "footprint"):
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return ([v for v in values if not isinstance(v,list)] +
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sorted((v for v in values if isinstance(v,list)), key=repr))
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# Coordinates, polygon vertex order, text and other ordered values must
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# remain ordered: sorting these could conceal an X/Y swap or zone edit.
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return values
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def main():
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assert hashlib.sha256(BASE.read_bytes()).hexdigest() == "53e36538c0669604457b9e1a9ff1b1e20422970e8f9f356088c4581868ad5045", "Pre-update snapshot changed"
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assert hashlib.sha256((ROOT/"serial-carrier.kicad_pro").read_bytes()).hexdigest() == "9ad5b992785ebfe01fa7ea4e1aa391a2c7d7f1f2c3b1c13136173c301ecb6516", "Project settings changed"
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before = PCB.read_bytes()
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board = p.LoadBoard(str(PCB))
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verify(board)
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silk_ids = {str(uuid.uuid5(SILK_NS,str(i))) for i in range(4096)}
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u1_ids = {str(uuid.uuid5(U1_NS,str(i))) for i in range(6)}
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# The original baseline retains historical draft labels. Permit only the
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# exact requested title/revision/comment edits and removal of the silk label.
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# Keep proving the original integration against its original evidence, then
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# audit the explicitly authorized subsequent placement/routing delta.
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from validate_group_alignment import audit, BASE as GROUP_BASE
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assert canonical(expected_tree(parse(BASE)), silk_ids) == canonical(parse(GROUP_BASE), silk_ids | u1_ids), "Historical U1 integration changed"
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audit()
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generated = [g for g in board.GetDrawings() if g.m_Uuid.AsString() in silk_ids]
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assert not any(isinstance(g,p.PCB_TEXT) and g.GetText()=="HEADER GUIDES" for g in board.GetDrawings())
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carrier = Polygon([(136,100),(182,100),(182,180),(100,180),(100,119),(136,119)])
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mouths = []
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for g in generated:
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assert g.GetLayer() == p.F_SilkS
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for edge in outline_lines(g):
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assert carrier.covers(edge.buffer(p.ToMM(g.GetWidth())/2)), "Silk outside carrier/notch"
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if g.GetWidth() == p.FromMM(0.3):
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mouths.append(g)
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assert len(mouths) == 2
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assert sorted((xy(g.GetStart()),xy(g.GetEnd())) for g in mouths) == [
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((110.795,177.705),(119.665,177.705)),
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((122.195,177.705),(131.065,177.705))]
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# A second refresh must reproduce all drawing geometry and UUIDs.
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add_outlines(board)
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with tempfile.TemporaryDirectory(prefix="u1-regression-") as temporary:
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result = Path(temporary)/PCB.name
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assert p.SaveBoard(str(result),board,True)
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assert canonical(parse(result)) == canonical(parse(PCB)), "Silkscreen refresh not idempotent"
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u1 = next(f for f in board.GetFootprints() if f.GetReference()=="U1")
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shape = next(g for g in u1.GraphicalItems() if isinstance(g,p.PCB_SHAPE))
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shape.SetWidth(shape.GetWidth()+1)
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try:
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verify(board)
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except AssertionError:
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pass
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else:
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raise AssertionError("Stale embedded geometry was not rejected")
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assert PCB.read_bytes() == before
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assert not (ROOT/"~serial-carrier.kicad_pcb.lck").exists()
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summary = dict(measured_library_matches_embedded_u1=True,
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historical_u1_integration_and_subsequent_authorized_group_delta_verified=True,
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presentation_label_cleanup=True,
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silk_refresh_idempotent=True, stale_geometry_negative_control=True,
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silk_clipped_to_carrier=True, usb_mouth_markers=2,
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generated_silk_items=len(generated),
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baseline_sha256=hashlib.sha256(BASE.read_bytes()).hexdigest(),
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board_sha256=hashlib.sha256(before).hexdigest(),
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project_sha256=hashlib.sha256((ROOT/"serial-carrier.kicad_pro").read_bytes()).hexdigest())
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(ROOT/"validation/pcb-u1-group-regression.json").write_text(json.dumps(summary,indent=2)+"\n")
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print(json.dumps(summary,indent=2))
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if __name__ == "__main__":
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main()
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