5.9 KiB
Electrical tests
These procedures verify the MAX3243 breakout, UART1 data path, hardware flow control, and session broker. They are manual tests: the firmware never starts one automatically.
Safety: With power removed, install only the wiring required by the selected test. DE-9 pins 3 (
TX), 4 (DTR), and 7 (RTS) are driven outputs. Never connect one of these outputs to another driven output. Keep temporary Dupont wiring short and secure.
Configuration A: data and handshake pairs
Connect the following pairs:
| Driven output | Receiver input | Expected ESP32 logic |
|---|---|---|
DE-9 pin 3, TX |
DE-9 pin 2, RX |
RX == TX |
DE-9 pin 4, DTR |
DE-9 pin 6, DSR |
DSR == DTR |
DE-9 pin 7, RTS |
DE-9 pin 8, CTS |
CTS == RTS |
DE-9 pin 3 TX ─────> pin 2 RX
DE-9 pin 4 DTR ─────> pin 6 DSR
DE-9 pin 7 RTS ─────> pin 8 CTS
Run debug loopback-a. The test cycles all TX/DTR/RTS states and verifies the three receivers and VLD. Driver and receiver inversions cancel, so the resulting ESP32 logic levels must match.
This configuration also supports debug valid-test, debug uart-loopback <baud> [format] [bytes], and debug uart-suite; the UART commands need only the pin 3-to-2 connection.
Configuration B: remaining receivers
Remove every configuration A jumper, then connect:
| Driven output | Receiver input | Expected ESP32 logic |
|---|---|---|
DE-9 pin 3, TX |
DE-9 pin 1, DCD |
DCD == TX |
DE-9 pin 4, DTR |
DE-9 pin 9, RI |
RI == DTR |
DE-9 pin 7, RTS |
DE-9 pin 2, RX |
RX == RTS |
DE-9 pin 3 TX ─────> pin 1 DCD
DE-9 pin 4 DTR ─────> pin 9 RI
DE-9 pin 7 RTS ─────> pin 2 RX
Run debug loopback-b. Configurations A and B together exercise all three drivers and five receivers.
CTS transmit gating
Disconnect all external DE-9 equipment, power down, and remove previous jumpers. Install only:
| Driven output | Receiver input | Purpose |
|---|---|---|
DE-9 pin 3, TX |
DE-9 pin 2, RX |
Return UART1 data for comparison |
DE-9 pin 4, DTR |
DE-9 pin 8, CTS |
Present inactive and active CTS states |
DE-9 pin 3 TX ─────> pin 2 RX
DE-9 pin 4 DTR ─────> pin 8 CTS
Run debug cts-flow-test. At 115200 baud with hardware CTS enabled, the firmware first queues 512 bytes while CTS is inactive and confirms that no data is sent for 250 ms. It then activates CTS and verifies automatic, exact transmission and reception of all bytes.
RTS receive backpressure
Disconnect all external DE-9 equipment, power down, and remove previous jumpers. Install only:
| Driven output | Receiver input | Purpose |
|---|---|---|
DE-9 pin 4, DTR |
DE-9 pin 2, RX |
Carry UART2-generated data to UART1 RX |
DE-9 pin 7, RTS |
DE-9 pin 1, DCD |
Return UART1 RTS to UART2 CTS |
UART2 TX / DE-9 pin 4 DTR ─────> pin 2 RX / UART1 RX
UART1 RTS / DE-9 pin 7 RTS ─────> pin 1 DCD / UART2 CTS
Run debug rts-flow-test. UART2 queues 4096 bytes while UART1 is initially unread. Once UART1 reaches its receive threshold, it deasserts RTS and stops UART2 through CTS. Draining UART1 must reassert RTS and let UART2 finish. UART_BUFFER_FULL is expected; FIFO overflows, framing/parity errors, breaks, or any data mismatch are failures.
Voltage and polarity checks
With no DE-9 loopback jumpers installed, measure pins 3, 4, and 7 relative to DE-9 pin 5 (GND):
debug drivers 0 0 0
Each output should be at a positive RS-232 voltage. Then run:
debug drivers 1 1 1
Each output should be negative. Exact voltages depend on supply, load, meter, and charge-pump behavior; polarity is the important result.
Recommended order
- With no DE-9 jumpers, run
status. - Measure output polarity with
debug drivers 0 0 0anddebug drivers 1 1 1. - Power down, install configuration A, power up, and run
debug loopback-a. - Run
debug valid-testwith configuration A still installed. - Keep only pin 3-to-2 and run
debug uart-loopback 9600 8N1 256, thendebug uart-suite. - Power down, install configuration B, power up, and run
debug loopback-b. - Power down, install CTS wiring, power up, and run
debug cts-flow-test. - Power down, install RTS wiring, power up, and run
debug rts-flow-test.
RTS and CTS remain GPIO signals during static and basic UART tests. Only the flow-control tests assign them to UART peripherals. The firmware shuts down the MAX3243 while changing GPIO-matrix routing and restores outputs to static logic 1 after each test.
Session-broker loopback
This test verifies broker fan-out and writer ownership independently of the diagnostics. Disconnect external peers, power down, remove previous jumpers, and connect only DE-9 pin 3 (TX) to pin 2 (RX). Power up and run:
serial start
broker connect writer
broker connect observer
broker clients
Use the client IDs printed by the device:
broker request-writer <writer-id>
broker send-hex <writer-id> 0055aaff1b5b33316d
broker read <writer-id> 64
broker read <observer-id> 64
Both clients should receive 0055aaff1b5b33316d. A read may return zero if UART1 has not returned the bytes yet; repeat it shortly afterward.
Verify writer exclusion and administrative reassignment:
broker request-writer <observer-id>
broker send-hex <observer-id> dead
broker force-writer <observer-id>
broker send-hex <observer-id> 112233
broker read <writer-id> 64
broker read <observer-id> 64
broker events <writer-id>
broker events <observer-id>
The competing request and its initial send should fail. After reassignment, both clients should receive 112233; events should show denial, revocation, and grant. Clean up:
broker disconnect <observer-id>
broker disconnect <writer-id>
serial stop
Remove the loopback jumper with power off before connecting an external serial device.